Lead Application Engineer – Digital Verification

Cadence Design Systems · English · EDA Software · Semiconductor IP & Chip Design Services · Travel required · Bachelor's Degree · Verilog · SystemVerilog · VHDL · SystemC · 6 months ago
Closed
This job closed on Oct 19, 2026 It was open for 145 days. Cadence Design Systems has 478 other roles open.
478 roles at Cadence Design Systems 147 Hardware roles in Vietnam 659 remote Hardware roles
Salary
≈ $25k – $57k per year (Estimated)
Location
In office (Ho Chi Minh City)
Seniority
Staff · 5+ years exp
Visa
Sponsors visas in United States, Ireland, Canada; no register of this country names it
Employment
Full-Time

Removed from the employer's board on Oct 19, 2026. First seen by Alion on May 28, 2026. Cadence Design Systems scores B on the Alion truth index.

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Cadence Design Systems

Cadence Design Systems is an American software company founded in 1988 that supplies the electronic design automation tools engineers use to design and verify integrated circuits. Its products cover digital synthesis and place-and-route, custom and analogue design, circuit simulation with the Spectre and Virtuoso families, functional verification, and increasingly system-level analysis for packaging, thermal behaviour and computational fluid dynamics. Headquartered in San Jose and listed on Nasdaq, it also licenses design intellectual property such as processor and interface blocks, and competes primarily with Synopsys and Siemens EDA.
cadence.com · HQ: San Jose, United States · Semiconductor IP & Chip Design Services · EDA Software · 5000+ employees · Est. 1988
Tech stack of Cadence Design Systems
Backed by Sequoia Capital

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • Act as a tech consultant to lead and support Cadence digital verification solution for customer projects or pre-sales engagements
  • Work closely with the sales team to identify, qualify, and scope opportunities for Cadence’s digital functional logic verification solutions.
  • Understand customer goals and objectives, and plan, execute, and manage key technical evaluations in close collaboration with customers and internal teams.
  • Proactively engage with existing and prospective customers to ensure successful adoption and deployment of Cadence verification technologies.
  • Summarize project activities, status, and outcomes, and report effectively to management while sharing knowledge and best practices within the team.
  • Train, ramp-up and accompany customer project to ensure successful execution and adoption.
  • Deliver basic and advanced trainings, technical presentations, and product demonstrations as required.
  • Provide deep technical expertise to address complex customer issues and inquiries that require expert-level support.

Requirements:

  • Bachelor’s degree or higher in Computer Science, Electrical Engineering, or a related field, with 5-10 years of relevant industry experience.
  • 5-10 years of hands-on experience and strong expertise in hardware design and/or verification methodologies.
  • Solid hands-on verification experience using UVM, SystemVerilog, Verilog, VHDL, SystemC, and SystemVerilog Assertions (SVA).
  • Hands-on experience with Cadence Verification IP or Jasper is a strong plus.
  • Good understanding of code coverage and functional coverage concepts, tools, and technologies.
  • Strong communication skills in English, with the ability and motivation to work in a global, customer-facing environment with customers and internal business unit teams.
  • Valid passport with no travel restrictions; willingness to travel as required.

We’re doing work that matters. Help us solve what others can’t.

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