Design Verification Engineer

Job Responsibilities

• Design, develop, and maintain robust verification environments, testbenches, reusable verification components, and reference models for block- and system-level designs.
• Develop comprehensive verification plans and create test cases to ensure complete functional coverage.
• Verify RTL designs at both block and chip levels using directed testing, constrained-random verification, assertion-based verification (ABV), formal verification techniques, and functional coverage methodologies.
• Perform RTL code coverage analysis, assertion coverage, functional coverage, and gate-level simulations to validate design quality and completeness.
• Debug and resolve design and verification issues by collaborating closely with design, architecture, and cross-functional engineering teams.
• Drive the adoption of advanced verification methodologies, automation frameworks, and best practices to improve verification quality and efficiency.
• Apply data-driven analytics and AI-assisted techniques to improve test generation, regression analysis, coverage optimization, and debug productivity.
• Continuously improve verification processes, infrastructure, and reusable verification IP to accelerate development cycles and enhance design quality and reliability.

Job Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 10+ years of industry experience, or a Master's degree with 7+ years of relevant experience.
• Proven experience verifying complex ASIC designs at both block and system levels.
• Strong proficiency with SystemVerilog and the Universal Verification Methodology (UVM).
• Extensive knowledge of ASIC design verification methodologies, verification flows, and industry best practices.
• Experience collaborating with cross-functional teams to deliver ASIC products from architecture through first customer shipment (FCS).
• Strong programming and scripting skills in C, C++, and/or Python.
• Excellent debugging and root-cause analysis skills with the ability to independently resolve complex design and verification issues.
• Experience with verification planning, functional coverage, assertion-based verification (ABV), constrained-random verification, and regression management.
• Domain knowledge of Ethernet, PCIe, and switch fabric architectures is highly desirable.
• Familiarity with data analytics, AI/ML-assisted verification techniques, or automation tools to improve test generation, regression analysis, coverage closure, and debug productivity is a plus.
• Strong analytical, problem-solving, and communication skills with a passion for solving complex technical challenges.
• Self-motivated, detail-oriented, and able to work effectively both independently and as part of a collaborative engineering team.