Signal Integrity Senior Engineer
Confirmed on the employer's own hiring board on Oct 18, 2026. First seen by Alion on Jun 22, 2026. Upscale AI scores A on the Alion truth index.
Position Summary
We are seeking an experienced Senior Signal Integrity Engineer to lead SI/PI design and validation activities for next-generation high-speed networking, AI, and data center products. The ideal candidate will have deep expertise in high-speed PCB design, simulation, measurement, and correlation across complex systems operating at 112G and 224G data rates.
Responsibilities
- Lead Signal Integrity and Power Integrity analysis for complex PCB and system designs.
- Define SI/PI architecture, design rules, and channel budgets for high-speed interfaces.
- Perform detailed channel simulations and optimization using industry-standard tools.
- Drive correlation between simulation and laboratory measurements.
- Develop and validate models for packages, PCBs, connectors, cables, and complete channels.
- Conduct pre-layout and post-layout SI/PI analysis.
- Perform compliance and interoperability analysis for industry standards.
- Debug complex signal integrity issues and drive root-cause resolution.
- Define PCB stackups, routing requirements, via structures, and return path strategies.
- Mentor junior engineers and provide technical leadership across projects.
- Collaborate with silicon, package, board, mechanical, and manufacturing teams.
- Interface with vendors and customers on SI/PI-related technical topics.
Required Qualifications:
- BS/MS in Electrical Engineering or related field.
- 5+ years of experience in Signal Integrity, High-Speed Design, or related areas.
Strong understanding of:
- Signal Integrity and Power Integrity principles
- Electromagnetic theory
- Transmission line analysis
- High-speed SerDes architectures
- PCB and package design
- Channel compliance methodologies
Extensive hands-on experience with:
- Ansys HFSS
- Cadence Clarity
- Cadence Sigrity
- Keysight ADS
Strong laboratory experience with:
- Vector Network Analyzer (VNA)
- TDR/TDT systems
- High-bandwidth oscilloscopes
- De-embedding and calibration techniques
Experience analyzing:
PCB channels, Connectors, Cables, Packages, Backplanes and midplanes
Ability to correlate simulations with measured results and drive design improvements.
Preferred Qualifications:
- Experience with 112G/224G PAM4 SerDes systems.
- Experience with Ethernet, PCIe, UCIe, CXL, DDR, or AI networking products.
- Knowledge of COM, ERL, eye analysis, jitter decomposition, and channel compliance methodologies.
- Experience with Python, MATLAB, or automation frameworks.
- Experience leading SI strategy for large-scale hardware programs.
Desired Attributes:
- Strong technical leadership and mentoring skills.
- Excellent cross-functional communication.
- Ability to drive projects independently from concept through production.
- Customer-facing and vendor collaboration experience.
- Passion for solving challenging high-speed design pro