SI/PI Senior Engineer/Manager

MediaTek • Semiconductors • Wireless • 1 day ago
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Salary
≈ $111k – $210k per year (Estimated)
Location
In office (San Jose)
Seniority
Senior

Confirmed on the employer's own hiring board on Sep 25, 2026. First seen by Alion on Jul 9, 2026. MediaTek scores C on the Alion truth index.

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MediaTek

MediaTek Inc. is a global fabless semiconductor company specializing in system-on-chip (SoC) architectures and digital multimedia processing technologies. The enterprise designs and markets integrated circuits for smartphones, smart home devices, IoT hardware, wireless connectivity solutions, automotive electronics, and custom AI chips for edge and cloud applications. Headquartered in Hsinchu, Taiwan, the organization operates an international network of research, development, and sales offices serving original equipment manufacturers (OEMs) and technology brands worldwide.
mediatek.com • HQ: Hsinchu, Taiwan • Hardware • Wireless • Semiconductors • 1001-5000 employees • Est. 1997
MediaTek is seeking a highly skilled SI/PI Senior Engineer/Manager to lead signal integrity (SI) and power integrity (PI) initiatives across our chip, package, and PCB development workflows. This role is critical in delivering high-performance solutions for consumer, automotive, datacenter and enterprise HPC products.

The successful candidate will bridge the gap between architectural definition and final product validation, ensuring robust design constraints, optimal PDN performance, and seamless integration of high-speed interfaces. He/She will play a pivotal role in defining the next generation of connectivity and power delivery for MediaTek's products.

Roles and Responsibilities:

  • Define comprehensive SI/PI specifications and design constraints for memory (DDR, LPDDR, HBM), D2D, and high-speed SerDes interfaces. Establish PDN specifications and power delivery requirements for high-performance CPU, GPU, APU blocks.
  • Execute EM simulations for chip, package, and PCB systems using industry-standard tools. Generate accurate SPICE-level models for Si-PDN/IR analysis.
  • Lead root-cause investigations for SI/PI issues encountered during silicon bring-up, prototype testing, or field returns.
  • Provide technical support and consultancy to customers regarding SI/PI challenges. Coordinate closely with external partners and suppliers to align on process windows, material selections, and design-for-manufacturability (DFM) criteria.
  • Author and maintain design guidelines, and best-practice manuals to standardize SI/PI methodologies across teams.
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